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1Learning Outcomes

2Memory Caches

Caches are the basis of the memory hierarchy.

How do we create the illusion of a large memory that we can access fast? From P&H 5.1:

Just as you did not need to access all the books in the library at once with equal probability, a program does not access all of its code or data at once with equal probability. Otherwise, it would be impossible to make most memory accesses fast and still have large memory in computers, just as it would be impossible for you to fit all the library books on your desk and still find what you wanted quickly.

Table 1:Principles of temporal and spatial locality.

PropertyTemporal LocalitySpatial Locality
IdeaIf we use it now, chances are that we’ll want to use it again soon.If we use a piece of memory, chances are we’ll use the neighboring pieces soon.
Library AnalogyWe keep a book on the desk while we check out another book.If we check out volume 1 of a reference book, while we’re at it, we’ll also check out volume 2. Libraries put books on the same topic together on the same shelves to increase spatial locality.
MemoryIf a memory location is referenced, then it will tend to be referenced again soon. Therefore, keep most recently accessed data items closer to the processor.If a memory location is referenced, the locations with nearby addresses will tend to be referenced soon. Move lines consisting of contiguous words closer to the processor.

3Memory Access with/without a Cache

Consider how memory access works with a cache, as in Figure 1.

"TODO"

Figure 1:Caches in the basic computer layout (from an earlier section).

When a load or store instruction is accessed, memory data access is requested. There are two situations that can occur:

We discuss strategies for associating addresses with cache lines in detail (later).

4Key Cache Terminology

Where we place a new line from memory depends on its placement policy. Placement policy additionally determines the metadata overhead for this cache. We discuss three types of placement policies in this course:

Footnotes
  1. For the Apple M1 chip, L1 cache has 64-byte lines, whereas L2 cache has 128-byte lines. GoFetch.

  2. Tag, valid bit, dirty bit, etc. Discussed in the next chapter.